#ifndef FlexCAN_H
#define FlexCAN_H

//PORTE
#define CAN0_PORT_RX_IDX    4
#define CAN0_PORT_TX_IDX    5
//PORTC
#define CAN1_PORT_RX_IDX    6
#define CAN1_PORT_TX_IDX    7
//PORTB
#define CAN2_PORT_RX_IDX    12
#define CAN2_PORT_TX_IDX    13
//DMA
#define CAN0_DMA_CH         12
#define CAN1_DMA_CH         13
#define CAN2_DMA_CH         14

#define CAN0_MBS_MAX    32
#define CAN1_MBS_MAX    32
#define CAN2_MBS_MAX    16

#define MSG_BUF_SIZE        4u    /* 1 Msg Buffer Size : CAN0->RAMn[i] use 4word(1word=4byte). 4word = 2word header, 2word Data*/
#define MB_FIFO_NUM         6u    /* MB Size used for FIFO engine: MB0~5 */
#define MB_FIFO_IDX_RX      6u    /* MB for receiving CAN message*/
#define FIFO_IDX_RXMB     0u    /* MB for receiving CAN message*/    
#define FIFO_IDX_TXMB      13u    /* MBx for transmitting CAN message //Table 53-6. Rx FIFO filter: possible structures */

#pragma pack(1)
typedef struct                 /*发送接收报文结构体*/
{
    uint32_t Id;
    uint8_t Data[8];
    uint8_t Rtr;
    uint8_t Ide;    
    uint8_t Len;
    uint8_t Prty;
    uint8_t Srr;
    uint32_t timestamp;
}CAN_FrameStruct;


typedef struct 
{
    u8      DMA_Ch; /*配置DMA通道 eg: DMA_CH0*/
    IRQn_Type   IRQn; /*中断编号*/
    u8      pri;   /*中断优先级*/
    u8   IRQs;  /*中断源*/
    volatile u32 *SrcAddr;    /*源地址   eg: (u32)Dma_Src	*/
    volatile u32 *DstAddr;  /*目的地址*/
}CAN_Dma_Cfg;

typedef struct 
{
    uint8_t                             CANChannel;
    uint8_t                             NumOfMbs; //message buffer个数
    uint8_t                             NumOfWords; //message buffer words个数
    uint8_t                             NumOfFifoMbs; //fifo message buffer个数
    CAN_Dma_Cfg                         dmaCfg;
}CAN_Cfg;
#pragma pack()

void FLEXCAN0_init(void);
void FLEXCAN0_NVIC_init_IRQs (void);
void FLEXCAN0_TX_Msg(void);
void FLEXCAN1_init(void);
void FLEXCAN1_NVIC_init_IRQs (void);
void FLEXCAN1_TX_Msg(void);
void FLEXCAN2_init(void);
void FLEXCAN2_NVIC_init_IRQs (void);
void FLEXCAN2_TX_Msg(void);


#endif
